Digital communications including 5G solutions

The 5G NR market is driving the processing power and flexibility requirements of the digital communications system to an entirely new level. Based on individually configurable single and multicores, with user-definable number of ALUs per core the VSORA architecture has been specifically designed to fulfil these new requirements. The flexibility of the solution makes it standard agnostic, so 4G, 5G and WLAN, including Wi-Fi 6, can easily be implemented using the same hardware.

VSORA meets the challenge with a development platform that allows you to select DSP-Cores with different sizes. Our approach offers better system power control and silicon area optimization.

Highlights

  • High processing power eliminates the need for specific coprocessors and hardware accelerators and ensures greater flexibility.
  • Customizable hardware with a configurable number of ALUs per core and unlimited number of cores.
  • Futureproof should standards evolve.
  • Higher processing power to handle MiMo, beamforming and carrier aggregation requirements.
  • Floating point precision can be user specified to optimize the system.
  • High-level, platform independent design flow (C++/Matlab-like).
  • Optimally maps algorithms, including non-parallel algorithms.
  • Easy mapping of algorithms to different cores.
  • Automatic handling of the interconnect between the different cores.
  • Compilation platform separates codes running in the different cores.
  • Lower energy consumption / power constraints.
  • High efficiency:
    • Signals handled in hardware.
    • Signal memory bandwidth scales with MPU processing power.
    • Multi-instructions per cycle / rich set of instructions.
  • Silicon area optimized to required processing power.

VSORA ADAS Sensor Solutions

VSORA has developed a unique, algorithm-agnostic architecture that allows you to optimize power, performance and silicon size.

For AI applications a single core is scalable from 256 to 65,536 MACs and the user has the ability to design a system with multiple cores, providing the user a wide range of choices. Even used as a regular signal processor VSORA provides a very powerful, flexible and scalable solution. A single core is capable of handling in excess of 1TMAC/second. In both cases there is no limitation on the number of parallel cores that can be used.

An innovative combination of software and hardware can reconfigure a system in a single clock cycle, to accelerate all current and future algorithms without hardware changes.

For the specific example provided by OSRAM above, two cores using 4,096 MACs each would provide 25 TOPS computing power. There is plenty of room to scale this up, as a single core of 65,536 MACs can provide up to 290 TOPS, and the ability to run multiple cores in parallel makes the selection process very easy and extremely flexible.

 

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