Multi - Core DSP
Extended design flexibility with segmented high processing power and low power dissipation.
Phy/data-link layer frontier
Single development platform combining signal processing and embedded SW codes. Tools identify the right resource to run the code: DSP or CPU.
Full and quick visibility on algorithm’s DSP load for better system optimization.
Collaboration Designs a First Version of the 5G NR Release 15 Physical Layer
with Investment from Omnes Capital, Partech Ventures, Angel Investor
The implementation of MiMo and Beamforming for 5G or other standards is a rather challenging task that, in addition to signal synchronization, requires the use of DSP-Cores with a range of processing power. VSORA meets the challenge with a development platform that allows the selection of DSP-Cores with different sizes (MPU-801 & MPU-3201). Our approach offers better system power control and silicon area optimization.